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CSE 4302 Assignment 1 Solutions

Computer Organization & ArchitectureSpring 2012

Note: Type or neatly show ALL your work in arriving at your answers, i.e. do not just

write down answers without the steps. This Assignment requires your independent work.The maximum score for this Assignment is 100 points.

1. [15points] Consider two different implementations, M1 and M2, of the sameinstruction set. There are three classes of instructions (A, B, and C) in the instruction set.

M1 has a clock rate of 80 MHz and M2 has a clock rate of 100 MHz. The average

number of cycles for each instruction class and their frequencies (for a typical program)are as follows:

(a) Calculate the average CPI for each machine, M1, and M2.

(b) Calculate the average MIPS ratings for each machine, M1 and M2.

(c) Which machine has a smaller MIPS rating? Which individual instruction class CPI do

you need to change, and by how much, to have this machine have the same or betterperformance as the machine with the higher MIPS rating (you can only change the CPI

for one of the instruction classes on the slower machine)?

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2. [25points] This is a two-part question (Part A and Part B):

Part A

Assume that a design team is considering enhancing a machine by adding MMX

(multimedia extension instruction) hardware to a processor. When a computation is run in

MMX mode on the MMX hardware, it is 10 times faster than the normal mode ofexecution. Call the percentage of time that could be spent using the MMX mode the

percentage of media enhancement.

(a) What percentage of media enhancement is needed to achieve an overall speedup of 2?

(b) What percentage of the run-time is spent in MMX mode if a speedup of 2 is

achieved? (Hint: You will need to calculate the new overall time.)

(c) What percentage of the media enhancement is needed to achieve one-half the

maximum speedup attainable from using the MMX mode?

Part BIf processor A has a higher clock rate than processor B, and processor A also has a higher

MIPS rating than processor B, explain whether processor A will always execute faster

than processor B. Suppose that there are two implementations of the same instruction set

architecture. Machine A has a clock cycle time of 20ns and an effective CPI of 1.5 forsome program, and machine B has a clock cycle time of 15ns and an effective CPI of 1.0

for the same program. Which machine is faster for this program, and by how much?

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3. [35points] In MIPS, write an assembly language version of the following C code

segment (a for loop in C):

int A[100], B[100];for (i=1; i < 100; i++){

A[i] = A[i-1] + B[i];}

At the beginning of this code segment, the only values in the registers are the base

addresses of arraysA and B in registers $a0 and $a1. Avoid the use of multiplicationinstructions they are unnecessary.

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4. [15points] Some machines have a special flag register which contains status bits.

These bits often include the carry and overflowbits. Describe the differences between thefunctionality of these two bits and give an example of an arithmetic operation that would

lead to them being set to different values.

5. [10points] Consider the following assembly code:

r1 = 99

Loop:r1 = r1 1branch r1 > 0, Loophalt

(a) During the execution of the above code, how many dynamic instructions are

executed?

The Loop contains 2 instructions, and will be executed 99 times. Thus the total number

of dynamic instructions running this code will be: 1 + 2*99 + 1 = 200.

(b) Assuming a standard unicycle machine running at 100 KHz, how long will the above

code take to complete?

Execution time = 200 instructions * 1 / (100*103Hz) = 0.002 sec = 2000 s.